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signal_cpu_sort
- Use the verilog language write a MIPS CPU code, and have additional instruction, for example: selection sort instruction. The code has contain combination circuit and sequenial circuit. CPU have contain ALU, ADD, ALU_CONTROL, DATA_MEMORY, INST_ME
mips_creative
- 一个完整的MIPS CPU,创新设计,浙江大学某学生作品,有完整的说明文档、仿真文件和测试文件,可以直接综合和仿真。-a complete MIPS CPU, innovative design, a student of Zhejiang University works with complete documentation, simulation and test documents, and can be directly integrated simulation.
mlite.tar
- Plasma IP Core 你可以利用这个组件在FPGA中设计MIPS结构的CPU -Plasma IP Core You can use this component in FPGA design the structure of MIPS CPU
SC_22
- MIPS系列CPU下的测试代码,非常好的东西;-MIPS CPU series of test code, a very good thing;
umon_bootloader
- umon bootloader source code, support mips cpu.
MIPS_CPU
- 一个完整的MIPS CPU的设计,是创新设计项目,内含详细的项目设计报告-A complete MIPS CPU design, innovative design projects, detailed project design report containing
cpu
- 5 stage pipeline CPU, verilog HDL code-5 stage pipeline CPU
CPU
- 32位5级流水线CPU设计指令系统、指令格式、寻址方式、寄存器结构、数据表示方式、存储器系统、运算器、控制器和流水线结构等-32bit pipeline CPU
mipscpudesign
- cpu设计实例mips。MIPSI指令集32位CPU(1)MiniCore设计实例全32位操作,32个32位通用寄存器,所有指令和地址全为32位 (2)静态流水线(3~5级) (3)Forwarding技术 (4)片内L1 Cache,指令、数据各4KByte,硬件初始化 (5)没有TLB,但系统控制协处理器(CP0)具有除页面映射外的全部功能 -cpu design example mips. MIPSI instruction set 32-bit CPU (1)
IP_CORES
- IC内核的设计源码!其中包含MP3内核,CPU内核,I2C内核等多达式种IC设计的源码!-IC design of the kernel source code! MP3 contains one of the kernel, CPU core, I2C kernel up-type species such as IC design source!
mips1
- Verilog MIPS design. I found it somewhere on Internet and it is working :-Verilog MIPS design. I found it somewhere on Internet and it is working :))))
mips-iv
- MIPS 指令集,比see mips 更适合用作手册使用-This appendix describes the instruction set architecture (ISA) for the central processing unit (CPU) in the MIPS IV architecture. The CPU architecture defines the non-privileged instructions that execute in user mode.
PipelineCPU
- Quartus II 7.2环境中,采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计-quartusII mips pipeline 32bit cpu design
32mips-cpu
- 基于32为MIPS指令设计的cpu,32 for the MIPS instruction based on the design of the cpu-32 for the MIPS instruction based on the design of the cpu
mips-cpu.zfx
- MIPS体系结构概述。学习MIPS体系结构编程,尤其是对想要熟悉龙芯结构的xdjm会很有用哦~-Overview of MIPS architecture. MIPS architecture to learn programming, in particular the Godson you want to know the structure would be useful xdjm Oh ~
MIPS
- 基于32位字长的MIPS cpu设计的代码实现,包括指令和寄存器数据-Based on a 32-bit word length MIPS cpu design code, including instructions and register data
MIPS-CPU
- 完整的32位MIPS处理器工程,拥有整个工程和doc文件说明-Full 32-bit MIPS processor works with the entire project and doc file descr iption
cpu-info
- Capability and feature descr iptor structure for MIPS CPU.
CPU
- 多周期CUP用MIPS汇编的实现,包含了测试指令。(Multi cycle CUP with MIPS compilation of the implementation, including the test instructions.)
mips-cpu-master
- CPU设计,已通过模拟,有需要的自行下载吧(CPU design has been simulated)